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Difference between revisions of "/aig/ Alternative ISA General"
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While discussion of Intel or AMD hardware is not absolutely prohibited (and even if it were, who is gonna enforce this? LOL), due to the ubiquity of x86 hardware, it is assumed that whatever concerns such architecture can be discussed in any of the other gorillion threads on the board. | While discussion of Intel or AMD hardware is not absolutely prohibited (and even if it were, who is gonna enforce this? LOL), due to the ubiquity of x86 hardware, it is assumed that whatever concerns such architecture can be discussed in any of the other gorillion threads on the board. | ||
| + | |||
| + | Old threads are available on [https://desuarchive.org/g/search/subject/aig/type/op/ Desuarchive]. | ||
== Ongoing projects == | == Ongoing projects == | ||
| Line 22: | Line 24: | ||
== Resources == | == Resources == | ||
Anon has been kind enough to put together a small [https://mega.nz/file/0PplHSyL#eK_f2ZSc2f0E8_RLUGz9nVn40myXhyiRDMU_FhgO2wk reference library]. | Anon has been kind enough to put together a small [https://mega.nz/file/0PplHSyL#eK_f2ZSc2f0E8_RLUGz9nVn40myXhyiRDMU_FhgO2wk reference library]. | ||
| + | |||
| + | A collection of brief infocards for many different processors is available on [http://www.textfiles.com/programming/CARDS/ TextFiles] which also holds huge archives relating to programming and microcomputers, especially 8-bit processors. | ||
| + | |||
| + | |||
| + | = ISA Overview = | ||
| + | ISA simply means Instruction Set Architecture. This is what the programmer sees from the outside, which these days is very different from the microcode and state machines operating inside the processors, normally inaccessible for normal programmers. The mid 1970's saw a Cambrian explosion of architectures that later fossilised into what we see today. Any assembly programmer and academics such as Hennessy and Patterson agree that x86 stinks, but as usual inertia and money trumps speed, efficiency and elegance. Those three qualities are what we instead celebrate in this general. | ||
| + | |||
| + | The same ISA can be implemented by many different internal architectures and microcode. The ISA is the main topic but since many architectures are DIY we discuss both. The best way is to illustrate by examples of processors. An ISA is defined by a fairly large set of parameters | ||
| + | |||
| + | Registers: few or many. Few is good for low latency, many registers are good for lazy programmers and poor compilers. One cannot avoid noting modern processors have tons of registers but still seem sluggish. | ||
| + | |||
| + | Register use: accumulator based where all processing is via one (or 2, rarely more) main register; stack based where everything is performed on a stack; or register file where many registers can be used in similar ways. | ||
| + | |||
| + | Operands: 2-op instructions of the form A += X; or 3-op instructions of the form A = B + C. The former requires a little extra thought but 3-op is simple for lazy programmers and poor compilers. One cannot avoid noting modern processors drift towards 3-op instructions | ||
| + | |||
| + | Modes: Implied, immediate, absolute, absolute indexed, zeropage, zeropage indexed, stack relative, index indirect, indirect indexed, all with our without pre/post increment/decrement. | ||
| + | |||
| + | Much can be summarised as CISC that is complex, or RISC which is simple. The RISC definition has drifted over the decades, and changed from "simple" to register-to-register based operations with load-store memory handling. | ||
| + | |||
| + | |||
| + | == Processors == | ||
| + | |||
| + | === 8 Bit Processors === | ||
| + | These usually have 8 bit registers and a 16 bit program counter or instruction pointer (terminologies vary) and could access 64 KB memory. Most were accumulator based which worked well since in this era memory and CPUs were equally slow. | ||
| + | |||
| + | ==== 1802 ==== | ||
| + | This is a weird and wonderful processor implemented as bit serial architecture, which made it slow. It was still popular for games on machines such as Cosmac ELF. The fabrication made it radiation resistant and it was also popular for satellites, and is still in production. | ||
| + | |||
| + | ==== 6502 ==== | ||
| + | The 6502 had one accumulator (A), two index registers (X and Y), a stack pointer (S) and a processor status (P), all 8 bit wide; plus a 16 bit program counter (PC). It also had a zero page that could be used as address registers. It entered the market at a much lower price than 6800 and quickly won a following. It was used in many popular computers of that era including Apple 2, BBC and Commodore 64. For all the limitations it was powerful enough in the hands of skilled programmers to power the first spreadsheet (VisiCalc) which was also the first killer application, as well as 3D space games with hidden line wireframe graphics such as Elite. | ||
| + | |||
| + | The 6502 still has many loyal fans, a [http://6502.org/ hugely active community] and dozens of implementations. It is still supported commercially by [https://www.westerndesigncenter.com/ The Western Design Center], founded by the original designer. An estimated 200 million chips are made annually for an installed base estimated at 2 billion. Not bad for a nearly 50 year old design. This time span also means it is proven, and is therefore used in applications such as pacemakers, where lifetime guarantees take on an entirely new meaning. | ||
| + | |||
| + | The 6502 has two weaknesses. First of all it is awkward for 16 bit pointer handling, which is why The Woz overcame this by making SWEET-16 virtual processor. The second is that the 6502 is not suited for stack intensive languages such as C. This has been overcome by other virtual processors such as the p-machine. | ||
| + | |||
| + | |||
| + | ==== 6800 ==== | ||
| + | |||
| + | ==== 6809 ==== | ||
| + | This was the peak of 8-bit architectures, and even featured an opcode for multiplication. Hitachi got a license and made the 6309 variant that includes more registers | ||
| + | |||
| + | ==== Z-80 ==== | ||
| + | |||
| + | |||
== Links == | == Links == | ||
| + | The following is mostly a list of bookmarks. | ||
'''Amiga (Motorola 68k)''' | '''Amiga (Motorola 68k)''' | ||
Revision as of 13:13, 20 August 2021
Alternative ISA General is a discussion thread about non x86 hardware. "Alternative" doesn't mean "unpopular" it means "alternative to x86". While there have been such threads in the past, they were usually sporadic and not very well connected with one another, which meant that whatever transpired in one thread wasn't carried over to the next one.
Due to the rise of desktop-class ARM chips, interest in alternative hardware has risen, with many Anons even coming up with projects of their own. Therefore, a centralised place was needed, where we could keep track of the development and goals of the community.
While discussion of Intel or AMD hardware is not absolutely prohibited (and even if it were, who is gonna enforce this? LOL), due to the ubiquity of x86 hardware, it is assumed that whatever concerns such architecture can be discussed in any of the other gorillion threads on the board.
Old threads are available on Desuarchive.
Contents
Ongoing projects
Anons are currently interested in porting several open source projects to the PowerPC architecture. Currently the following proposals have been made:
Grand Theft Auto III
Re3 is a homebrew engine intended to replace proprietay RenderWare with an open source implementation. Anons have been discussing making a port for the 32-bit PowerPC version of Mac OS X.
The Elder Scrolls III: Morrowind
OpenMW is a free and open source modern re-implementation of the Gamebryo engine.
Tomb Raider
OpenLara is a Classic Tomb Raider open-source engine.
Resources
Anon has been kind enough to put together a small reference library.
A collection of brief infocards for many different processors is available on TextFiles which also holds huge archives relating to programming and microcomputers, especially 8-bit processors.
ISA Overview
ISA simply means Instruction Set Architecture. This is what the programmer sees from the outside, which these days is very different from the microcode and state machines operating inside the processors, normally inaccessible for normal programmers. The mid 1970's saw a Cambrian explosion of architectures that later fossilised into what we see today. Any assembly programmer and academics such as Hennessy and Patterson agree that x86 stinks, but as usual inertia and money trumps speed, efficiency and elegance. Those three qualities are what we instead celebrate in this general.
The same ISA can be implemented by many different internal architectures and microcode. The ISA is the main topic but since many architectures are DIY we discuss both. The best way is to illustrate by examples of processors. An ISA is defined by a fairly large set of parameters
Registers: few or many. Few is good for low latency, many registers are good for lazy programmers and poor compilers. One cannot avoid noting modern processors have tons of registers but still seem sluggish.
Register use: accumulator based where all processing is via one (or 2, rarely more) main register; stack based where everything is performed on a stack; or register file where many registers can be used in similar ways.
Operands: 2-op instructions of the form A += X; or 3-op instructions of the form A = B + C. The former requires a little extra thought but 3-op is simple for lazy programmers and poor compilers. One cannot avoid noting modern processors drift towards 3-op instructions
Modes: Implied, immediate, absolute, absolute indexed, zeropage, zeropage indexed, stack relative, index indirect, indirect indexed, all with our without pre/post increment/decrement.
Much can be summarised as CISC that is complex, or RISC which is simple. The RISC definition has drifted over the decades, and changed from "simple" to register-to-register based operations with load-store memory handling.
Processors
8 Bit Processors
These usually have 8 bit registers and a 16 bit program counter or instruction pointer (terminologies vary) and could access 64 KB memory. Most were accumulator based which worked well since in this era memory and CPUs were equally slow.
1802
This is a weird and wonderful processor implemented as bit serial architecture, which made it slow. It was still popular for games on machines such as Cosmac ELF. The fabrication made it radiation resistant and it was also popular for satellites, and is still in production.
6502
The 6502 had one accumulator (A), two index registers (X and Y), a stack pointer (S) and a processor status (P), all 8 bit wide; plus a 16 bit program counter (PC). It also had a zero page that could be used as address registers. It entered the market at a much lower price than 6800 and quickly won a following. It was used in many popular computers of that era including Apple 2, BBC and Commodore 64. For all the limitations it was powerful enough in the hands of skilled programmers to power the first spreadsheet (VisiCalc) which was also the first killer application, as well as 3D space games with hidden line wireframe graphics such as Elite.
The 6502 still has many loyal fans, a hugely active community and dozens of implementations. It is still supported commercially by The Western Design Center, founded by the original designer. An estimated 200 million chips are made annually for an installed base estimated at 2 billion. Not bad for a nearly 50 year old design. This time span also means it is proven, and is therefore used in applications such as pacemakers, where lifetime guarantees take on an entirely new meaning.
The 6502 has two weaknesses. First of all it is awkward for 16 bit pointer handling, which is why The Woz overcame this by making SWEET-16 virtual processor. The second is that the 6502 is not suited for stack intensive languages such as C. This has been overcome by other virtual processors such as the p-machine.
6800
6809
This was the peak of 8-bit architectures, and even featured an opcode for multiplication. Hitachi got a license and made the 6309 variant that includes more registers
Z-80
Links
The following is mostly a list of bookmarks.
Amiga (Motorola 68k)
Amiga 3000 running PPC software on KillerNIC NPU.
Compiled list of free/open sources related to classic Commodore Amiga computers
FS-UAE (Amiga emulator) released for Apple Silicon arm architecture
Amiberry (Emulate an Amiga on on your Raspberry Pi)
Atari (Motorola 68k)
FireBee Atari-compatible computer
ARAnyM (Atari Running on Any Machine) VM Software
Other Motorola 68k Links
News around Motorola 680x0 CPU computer systems
MIPS
Emulate Windows NT 4.0 MIPS version (translated)
A guide to running IRIX 6.5.22 in MAME
Windows NT 3.50/MIPS installation on QEMU/MIPS
NMOS 6502
Commodore 64 Preservation Project
Developing for the 6502 microprocessor and its relatives
The 6502 microprocessor Resource
POWER/PowerPC
Compiling for Powerpc, how to?
Fixing Radeon Linux graphics on PowerPC
GNU/Linux Open Hardware PowerPC notebook
More about Spectre and the PowerPC (or why you may want to dust that G3 off)
http://bgafc.t-hosting.hu/oses4ppc.php Operating Systems for PowerPC
RISC-V
SiFive: The Direction and Magnitude of SiFive Intelligence
SPARC
The Resurgence of SPARC/Solaris (Okamoto Rikiya)
SuperH
Hitachi SuperH RISC Engine (Kawasaki Ikuya et al)
SuperH RISC engine Family Features
VAX
The Computer History Simulation Project
VAX MP: SIMH VAX simulator able to execute OpenVMS (VAX/VMS)
Z80
Sharp PC-1500 (TRS-80 PC-2) resource page
Symb-OS is a multitasking windowing OS for Z-80
Hardware Reimplementation
An interesting fpga handheld is being crowdfunded, with a focus on security
FPGA-related repositories on GitHub
Raspberry Pi (arm)
Apple Silicon (arm)
Check if an app is native Apple Silicon or not yet
Apple fixes incorrect wear reporting
Virtual Processors
DCPU-16 was a virtual processor intended for the game 0x10c.
The p-code machine was a stack based virtual processor used by UCSD Pascal on Apple 2 and other machines.
Other
Developing for all sorts of CPU
High-energy Electron Beam Lithography for Nanoscale Fabrication
